The board
- Pay
- $108,000–$126,000
- Where
- Austin
- Posted
- Aug 28
The fab2 team can build anything. We design all the hardware and software needed to make chips and we make the fabs, tools, and components ourselves.
We're looking for exceptional, hands-on people who can iterate to the limits of what's possible.
fab2 was founded by Sam Zeloof and Jim Keller. Sam is best known for making chips in his garage, and Jim has been a leader in the semiconductor industry for the past 40 years.
We're hiring Process Engineering Interns for the winter term. The internship begins in January, with a preferred commitment of 4 to 8 months. We’re rebuilding the chip fabrication process from the ground-up, so you’ll be exposed to some really interesting and impactful work. This is a hands-on process engineering role—you’ll be responsible for experiment design and execution of new semiconductor and thin-film fabrication methods.
What you'd do
- Design and run experiments alongside senior process engineers
- Read academic papers and technical literature to inform experimental design; whiteboard ideas and iterate quickly
- Learn and operate a range of semiconductor tools, including deposition, etch, lithography, and metrology systems
- Develop, transfer, and optimize process recipes across platforms with a focus on consistency, yield, and throughput
- Analyze process data, troubleshoot recipe or equipment issues, and clearly document findings and results for the team
- Familiarity with data processing in Python
- Mechanical or maintenance experience with fab tools
- Housing Stipend to help with first month expenses
- Lunches daily, Dinners 3x per week, Stocked Office Kitchen with Snacks and Spindrifts
- Weekly Learning & Development opportunities
What they want
- Pursuing a Bachelor’s Degree or higher in engineering
- Ability to learn quickly and troubleshoot technical problems
- Hands-on experience with wafer fabrication tools (etch, deposition, patterning) and metrology tools (AFM, SEM, thin film measurement, etc.)
- Recipe development and optimization for some subset of thin film deposition, dry etch, or lithography.
- Strong foundation in theoretical semiconductor knowledge (devices, fabrication, etc.)