NVIDIA has continuously reinvented itself over two decades. Our invention of the GPU in 1999 fueled the growth of the PC gaming market, redefined modern computer graphics, and revolutionized parallel computing. More recently, GPU deep learning ignited modern AI — the next era of computing. NVIDIA is a “learning machine” that constantly evolves by adapting to new opportunities which are hard to tackle, that only we can pursue, and that matter to the world. This is our life’s work, to amplify human inventiveness and intelligence.
We are now looking for a motivated Physical Design and Timing Engineer – Intern to join our dynamic and growing team. If you want to challenge yourself and be a part of something great, join us today!
What you'd do
- Drive physical design, power, and timing closure for high-frequency and low-power designs.
- Help drive frontend and backend implementation in select areas, from RTL to GDSII.
- Run physical design experiments and help develop flows and methodologies.
- Pursuing an MS or Ph.D. in Electrical or Computer Engineering.
- Familiarity with applying AI/ML techniques to physical design workflows to accelerate design, analysis, or automation tasks.
- Knowledge of or experience with Static Timing Analysis (STA), power analysis, and power reduction.
- Some experience in logic synthesis and equivalence checking.
- Experience with physical optimization, e.g., placement, routing, clock tree, etc.
- Some background in industry-standard EDA tools (e.g., Cadence, Synopsys, Siemens, etc.).
- Proficiency in programming and scripting languages such as Perl, Tcl, Make, Python, etc.
- Starts
- 2026-09-15